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ASML and imec open high-NA EUV lithography lab

04 Jun 2024

Facility at ASML's Veldhoven headquarters offers access to the first prototype high-NA EUV scanner.

The semiconductor equipment giant ASML and electronics research center imec have opened a joint laboratory dedicated to high-numerical aperture (high-NA) extreme ultraviolet (EUV) lithography, seen by the pair as a key step towards mass production of chips using the state-of-the-art technology.

Following nearly six years of collaboration - including Zeiss with a key role in high-NA optics development - the laboratory is now said to be ready to provide both chip manufacturers and suppliers of materials and equipment access to the very first prototype high-NA EUV scanner, which ASML calls its TWINSCAN EXE:5000 tool.

ASML describes it as a milestone in preparing the technology, which like earlier EUV tools relies on a laser-driven light source, for high-volume manufacturing - something it now expects to see in the 2025-2026 timeframe.

“By giving leading-edge logic and memory chip manufacturers access to the high-NA EUV prototype scanner and surrounding tools, imec and ASML support them in de-risking the technology and develop private high-NA EUV use cases before the scanners will be operational in their production fabs,” announced the pair.

“Access will also be provided to the broader ecosystem of material and equipment suppliers and to imec’s high-NA patterning program.”

Learning curve acceleration
The TWINSCAN EXE:5000 offers a numerical aperture of 0.55, an upgrade on the current EUV scanner tool’s limit of 0.33 that provides another way to reduce the size of the most intricate features in transistors to the sub-nanometer level, without changing the wavelength of the light source creating the patterns.

ASML’s recently retired CEO Peter Wennink had predicted back in 2018 that high-NA EUV lithography would be introduced in high-volume manufacturing towards the middle of the current decade, with a mixture of “low-NA” and “high-NA” layers appearing inside semiconductor materials subsequently.

The firm’s new CEO, Christophe Fouquet, said of the collaboration: “The ASML-imec High NA EUV Lithography Lab provides an opportunity for our EUV customers, partners and suppliers to access the High NA EUV system for process development while waiting for their own system to be available at their factories.

“This type of very early engagement with the ecosystem is unique and could significantly accelerate the learning curve on the technology and smoothen the introduction in manufacturing. We are committed to work with and support our customers in this journey with High NA EUV.”

Transistor density
His imec counterpart Luc Van den hove added: “High NA EUV is the next milestone in optical lithography, promising the patterning of metal lines/spaces with 20 nm pitch in one single exposure and enabling next generations of DRAM chips.

“This will improve yield and reduce cycle time and even CO2 emissions compared to existing multi-patterning 0.33 NA EUV schemes. It will therefore be a key enabler to push Moore’s Law well into the ångström era.

“We are now thrilled to explore these capabilities in real life, using the prototype High NA EUV scanner. For imec and its partners, the High NA EUV Lithography Lab will act as a virtual extension of our 300 mm cleanroom in Leuven, enabling us to further improve the patterning ecosystem and push the resolution of the High NA EUV towards its ultimate limits.”

Recent commercial developments saw ASML ship the first modules of an initial high-NA EUV system to key customer Intel in December last year.

The upgrade is expected to enable feature shrinking of a further 1.7x compared with "regular" EUV, alongside a nearly three-fold increase in transistor density.

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