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Silicon photonics takes next step toward high bandwidth future

17 Mar 2015

IBM researchers attach silicon photonic chips directly to processor, promising faster, cheaper and lower energy solution for computing, cloud and data centers.

Scientists at IBM Research have demonstrated what they say could be an important step toward commercializing the next generation of "brain-like" computing technology. They established a method to integrate silicon photonic chips with the processor in the same package, avoiding the need for transceiver assemblies.

The IBM team says the new technique, which will be presented on March 25 at the OFC Conference and Expo in Los Angeles, Ca, USA, "should lower the cost and increase the performance, energy efficiency and size of future data centers, supercomputers and cloud systems."

To optimally benefit from photonic technology, a tight integration of the electrical logic and optical transmission functions is required. The optical chip needs to be as close physically to the electrical chip as possible to minimize the distance of electrical connection. This can only be accomplished if they are packaged together.

Bert Offrein, manager of the photonics group at IBM Research, Zurich, Switzerland, commented, "For more than 12 years, IBM has been a pioneer in the area of CMOS integrated silicon photonics, which integrates functions for optical communications on a silicon chip. In addition to the silicon technology advances at the chip-level, novel system-level integration concepts are also required.”

Optical interconnect technology is currently incorporated into data centers by attaching discrete transceivers or active optical cables, which are supplied in pre-assembled building blocks. The pre-packaged transceivers, are typically large and expensive, limiting their widespread use, Offrein said. Furthermore, such transceivers are mounted at the edge of the board, resulting in a relatively large distance between the processor chip and the optical components.

Direct attachment

Offrein and his IBM colleagues from Europe, the United States and Japan instead proposed an integration scheme in which the silicon photonic chips are treated in a similar way to ordinary silicon processor chips and directly attached to the processor package without pre-assembling them into standard transceiver housings.

This design improves the performance and power efficiency of the optical interconnects while reducing the cost of assembly. Challenges arise because alignment tolerances are critical, typically in the sub-micron range, and optical interfaces are sensitive to debris and imperfections, thus requiring the best in packaging technology.

The team demonstrated efficient optical coupling of an array of silicon waveguides to a substrate containing an array of polymer waveguides. The significant size difference between the silicon waveguides and the polymer waveguides originally presented a major challenge. The researchers overcame this obstacle by gradually tapering the silicon waveguide, leading to an efficient transfer of the optical signal to the polymer waveguide.

The method is scalable and enables the simultaneous interfacing of many optical connections between a silicon photonic chip and the system. The optical coupling is also wavelength and polarization-insensitive and tolerant to alignment offsets of a few micrometers, Offrein said.

"This integration scheme has the potential to massively reduce the cost of applying silicon photonics optical interconnects in computing systems," Offrein said. "Such systems will be key for future applications in the field of cloud-computing, big data, analytics and cognitive computing. In addition, it will enable novel architectures requiring high communication bandwidth, as for example in disaggregated systems," Offrein said.

'Passive alignment significance'

Graham Reed, Professor of Silicon Photonics and Group Leader at ORC, Southampton, UK, whose own group is working on passive alignment and production-scale testing of silicon photonics, said of the IBM pre-OFC announcement, "if IBM has successfully realized passive alignment then that is a significant achievement. If they can couple an array of fibers without having to resort to active alignment then that would be a result."

He added, "This pre-announcement does not specify how many fibers are coupled or whether it is transferable to production quantities, but these factors may become apparent at the OFC presentation." In recent years, there has been great expectation about the potential of silicon photonics to challenge traditional integrated electronics circuits with many companies and research labs vying to make various performance and production breakthroughs. Reed added that he expects his group to make some significant announcements during 2015.

Silicon Integrated Nanophotonics

IBM's Yurii A. Vlasov presented some of the company's developments at Photonics West 2015 in a plenary session entitled Silicon Integrated Nanophotonics:

About the Author

Matthew Peach is a contributing editor to optics.org.

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