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Scintil targets optical interconnects with latest funding round

21 Jun 2022

French startup has raised €13.5M in its second round of venture support.

Scintil Photonics, a Grenoble-based spin-out from the CEA-Leti silicon photonics laboratory, says it has raised another €13.5 million in venture funding.

The latest backing, led by Robert Bosch Venture Capital (RBVC) alongside existing investors Innovacom, Supernova Invest and Bpifrance, brings total funding so far to €17.5 million, and follows an initial €4 million tranche that was closed in September 2019.

Scintil says that the new money will help it to accelerate commercialization of optical interconnects based on photonic integrated circuits (PICs) combining silicon and compound semiconductor technologies to create more energy-efficient high-speed links.

The company, which is following a fabless manufacturing model, says that its single-chip products comprise both active and passive components, all made entirely from standard silicon photonics processes available at CMOS commercial foundries.

Optical amplifiers and lasers based on III-V semiconductor materials are then integrated on the backside of the silicon PICs.

“This unique all-in-one integration of amplifiers and lasers enables ultrahigh-speed communications, due to extensive parallelization and higher bit rates, from 800 to 3200 Gb/s with very compact chips,” states the firm.

Energy efficiency
The most obvious markets for that technology include data centers, high-performance computing, and 5G communications networks, with Ingo Ramesohl, managing director at RBVC, saying:

“Scintil Photonics’ monolithic integration of III-V lasers into silicon photonic chips is a key enabler for next-generation telecom, datacom and sensing.

“The CMOS-compatible process allows for higher design freedom, lower losses and a smaller footprint at low cost. We are excited to partner with Scintil Photonics as it uniquely unlocks further miniaturization and integration of PICs.”

Vincent Deltrieu, partner and member of the board at Innovacom, added: “Scintil Photonics products are tackling the energy efficiency issue in heavy loaded data center applications and 5G infrastructures. We are proud to contribute to this achievement.”

The latest funding round arrives after Scintil unveiled a prototype of its hybrid PIC at the Optical Fiber Conference (OFC) event in San Diego earlier this year.

Described as “the ultimate interconnection in high-speed communications”, the 1600 Gb/s device integrated state-of-the-art silicon modulators with germanium photodetectors and III-V-optical amplifiers.

At the time, Scintil’s CEO Sylvie Menezo commented: “The close collaboration with our commercial foundry was key to achieving this fabrication milestone, resulting in unprecedented levels of integration and performance.

“Scintil is already working with three leading-edge customers; and it is fundamental to them that we can prototype and produce in commercial high-volume silicon foundries, using multi-customer standard processes.”

Among the advantages claimed for the Scintil technology are a dramatic reduction in both the number of components and active alignments required, resulting in better cost efficiencies.

Fabrication steps
According to the Scintil web site, fabrication steps begin with a silicon-on-insulator (SOI) wafer, with the top silicon layer etched to define waveguides and other optical elements such as modulators, multiplexers, and demultiplexers.

Germanium photodetectors are then formed via epitaxial deposition, and silicon nitride material added to form low-loss, high-performance passive elements.

The wafer is then flip-bonded onto a new silicon handle, before the original substrate material is removed, leaving the buried oxide (BOX) layer on top. Unprocessed III-V laser, modulator, and amplifier dies can then be bonded onto the exposed BOX layer as required.

“The bonding step does not require any precise alignment as the epitaxial layers are not processed yet,” Scintil states.

Next, the substrates of the III-V devices can be removed, leaving only the active epitaxial layers on top of the BOX layer, and the gain layers are etched to define laser waveguides.

Electrical contacts are then made using materials and processes of CMOS-compatible foundries, with chemical mechanical planarization to enable integration with electronic circuits, which can be flip-chip assembled on the PIC surface in the normal way.

According to Scintil, the process enables high coupling efficiency of the lasers into the waveguide, without the need for tricky alignment steps, and leaves all of the optical components within a single chip.

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