Photonics unlocks chip bandwidth bottleneck

21 Sep 2004

The continuing rise in the speed of computer chips means that copper tracks on printed circuit boards could soon be unable to keep up. Oliver Graydon spoke to Intel about its plans for making the transition to high-speed optical interconnects.

From Opto & Laser Europe October 2004

Intel, the well known integrated circuit (IC) specialist, has made a prototype optical interconnect that can transfer data at 1 Gbit/s per channel between two silicon chips separated by 20cm. The 12-channel demonstrator suggests that the world's IT industry is moving a step closer towards incorporating photonics into PCs with the aim of overcoming bandwidth bottlenecks.

In fact, if Moore's law holds true and processing speed continues to double every 18 months, it is almost certain that a PC built in 2015 will require some form of internal optical data-bus to wire up its different chipsets. Over the next decade the bandwidth of interconnects inside a computer is expected to increase by an order of magnitude - from around 1GHz to 10GHz - thanks to developments such as the PCI Express bus. However, this increase will require a shift in technologies from the electrical to the optical domain.

Boost in speed "Ultimately, what will happen is that the chip will be able to go much faster than electrical interconnect designs can handle," explained Ian Young, director of Advanced Circuits and Technology Integration at Intel's Technology and Manufacturing Group. "At this point you start to ask what other options you have got, and the obvious one is to change the channel, using an optical interconnect to replace the limitations of an electrical one."

The fundamental problem facing computer manufacturers is that as bandwidth rises, the attenuation of copper tracks in printed circuit boards (PCBs) made from conventional dielectric material (known as FR4) starts to soar. For example, calculations suggest that at 10GHz a typical 20inch-long electrical interconnect may have an effective insertion loss as great as 50dB.

Although FR4 can be replaced with a new dielectric laminate called Rogers 4000 that potentially doubles the bandwidth of an electrical interconnect, the material is about five times more expensive and is only practical as a short-term fix.

With these issues in mind, Intel and others are busy exploring the option of using photons and optical waveguides to transfer data around a computer's motherboard. "We've got to go to a new medium that doesn't have the distance limitations of copper, and that means photons in a waveguide," said Young. "It's a technology that we are not going to leave untapped."

The big attraction of this approach is that an optical link supports much higher data rates than its electrical counterpart - potentially many tens or even hundred of gigabits per second - over far greater distances. This is good news for circuit designers, as it means that chips can be spread further apart, making it much easier to avoid very high thermal loads that plague modern PCBs packed with powerful chips. Today's short connections may maximize speed, but because the chips are so close together there is a risk of overheating.

"Maybe an electrical solution will stretch to 13-15Gbit/s, but other factors will start to come into play, such as the cost and ease of manufacturing," said Young. "We're not targeting an optical solution for 10Gbit/s chip-to-chip - we're setting goals at the 20Gbit/s rate and upwards."

Intel is not the only company keen to develop the necessary technology to make the transition to optics. IBM has just developed a new type of germanium-on-insulator photodetector which can be made by CMOS technology and is ideal for integrating into chips. And at the end of last year, IBM and Agilent embarked on a three-year $30m (€24.6m) project funded by the US Defense Advanced Research Projects Agency on the topic of optical interconnects for connecting multi-chip modules.

Intel believes that optics could be playing a role in board-to-board links in as little as two years' time, but that it will be least seven years before it is deployed for chip-to-chip communication. "The transformation from electrical to optical interconnects will gradually occur over time in the future," Young told Opto & Laser Europe. "Box-to-box is here today, board-to-board for backplane connections up to 30inches will happen sometime in the next 2-7 years and after that it will be chip-to-chip."

Two-pronged approach The IC giant is now busy building and testing prototype designs in a drive to find a cost-effective approach that will suit deployment on a commercial scale. In the May issue of Intel Technology Journal, the firm described its progress to date and unveiled two designs of chip-to-chip optical interconnects: a hybrid integration approach that relies on traditional packaging of separate optoelectronic and electronics (see figures 1 and 2); and a silicon optical bench that brings the two technologies together within a single housing (see figure 3).

"One group is trying to see what we can do with our silicon know-how, using etching for example, to help solve optical alignment problems; the other is trying something that is more compatible with conventional microprocessor packaging," said Young. "It's good that we're doing both because we may find that one or the other has a lower cost, a better performance or is easier to align."

Using the hybrid integration approach, Intel has demonstrated a 12-channel parallel optical interconnect that uses an array of vertical-cavity surface-emitting lasers (VCSELs) and polymer waveguides to transfer 1Gbit/s per channel between two chips separated by 20cm. The firm also says that this distance could be significantly extended using standard multimode fibre.

The prototype link consists of two transceiver chips, each of which is wired by high-speed microstrip lines to discrete optical transmitter and receiver sections. The transmitter consists of a 1x12 array of 850nm VCSELs and the receiver a 1x12 array of GaAs photodetectors.

Light signals from the VCSEL array are coupled via a 45° mirror into a 1x12 array of polymer waveguides which terminates with an MT [multi-terminal] connector. The photodiode array is connected in an identical fashion to a separate waveguide array. To create a functional link, the MT connectors from two separate transceiver chips were simply connected via a separate length of polymer waveguide. Intel says that of the 20 prototype assemblies that it made, 90% of them were fully functional.

The transceiver chip was fabricated by a 0.18µm CMOS fabrication process and contains all the necessary circuitry for driving the VCSEL array and processing the received signals from the photodetector array. This includes a clock unit, amplifiers, and bit error rate testing. The chip, along with the optoelectronics, was mounted on a standard microprocessor substrate (flip-chip pin grid array) using passive alignment.

Intel says that it used acrylate waveguides made by photobleach processing because they have the potential for high-volume, low-cost manufacture. The waveguides have a core dimension of 35x35µm and an optical loss of just 0.1dB/cm.

The loss of an entire link varied between 7dB (best case) and 12dB (worst case) per channel. The largest contributor to the loss is the coupling between the VCSELs or photodiodes and the waveguides. This loss is very sensitive to any misalignment (1dB half-width of ±10µm) and varied between 1.5 and 3dB in the prototype.

The other approach that Intel is exploring is to use a silicon optical bench which is mounted on a PCB. This exploits Intel's expertise in etching and processing silicon to create a platform for housing and passively aligning all the parts needed for a complete transceiver module (optical fibre, integrated circuits and laser, plus photodetector). Connections called "thu vias" run vertically through the base of the silicon package and connect the circuitry to the PCB beneath.

Either wet or dry etching can be used to create a trench and alignment stops for the optical fibre, a 45° mirror for coupling light from/to the fibre and a VCSEL or photodiode. This technique is as yet untested and represents a radical departure from conventional electronic packaging. However, it potentially offers a more integrated solution that could be cheap to produce.

Whichever approach proves the most successful in the lab, to make it to market it must be cost-effective and easy to manufacture in volume, with a supply chain already in place.

"I believe that we can build an optical link today, but if you want to dislodge an electrical 5-10Gbit/s solution then cost would be your problem," said Young. "In particular, the laser [VCSEL] is a concern. We've got to get a very low-cost device and the volumes that we need are two orders of magnitude higher than the industry is capable of supporting. We would probably ship in a single month the entire number of VCSELs that have been made to date."