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ASML and imec push towards sub-10 nm patterning

08 Oct 2013

Ongoing collaboration will see around 100 engineers work to advance chip feature scaling to the next level.

Leading lithography equipment vendor ASML and the nearby semiconductor research institute imec have launched their new “Advanced Patterning Center”, in a major effort to tackle the challenges of scaling down features in silicon chips.

As the semiconductor industry advances towards critical chip features smaller than 10 nm and overlay control measured in fractions of nanometers, the collaboration, located at the imec campus in Leuven, Belgium, will see an expected 100 engineers work on the various technical problems facing them.

To guarantee critical dimension uniformity and overlay control, they will collaborate to investigate the practical interaction between all the different steps in the chip patterning process – for which lithography is critical.

imec confirmed to optics.org that extreme ultraviolet (EUV) technology, the approach to lithography that it is hoped will result in a major step forward in feature scaling – but which has been beset by technical difficulties – will be a key part of the effort.

Beneficial relationship
imec will provide its state-of-the-art clean room infrastructure, which includes a full 300 mm semiconductor wafer pilot line with a potential extension to next-generation 450 mm production, for what the partners described as an "intensified" collaboration.

ASML will make available its most advanced lithography scanners, metrology systems and “holistic” lithography solutions.

ASML’s CTO Martin van den Brink said of the agreement, the latest step in a long-standing relationship between the two collaborators: “ASML and imec have been partners for almost as long as both organizations exist, and while we have both benefited from this relationship, I believe the biggest beneficiary has been the chip industry which has gained faster access to breakthrough technology.”

Luc Van den hove, imec’s CEO, added: “In order to stay ahead in today’s fast-evolving and equipment-intensive semiconductor business, it is critical that the entire semiconductor ecosystem has insight and access to state-of-the-art technology.”

“By bringing our collaboration to the next level, we will be able to expand our knowledge base more quickly and drive lithography advancements. In this way the global partner network of both companies will have access to the most advanced patterning processes for sub-10 nanometer technologies. This is crucial to better address future scaling and infrastructure challenges.”

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