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Taiwan’s UMC to mass-produce imec's silicon photonics technology

09 Dec 2025

Licensing deal sees imec-developed process featuring co-packaged optics shift to full-size wafer production.

United Microelectronics Corporation (UMC), the giant Taiwan-headquartered chip foundry, has signed a licensing deal to transfer and scale up production of devices using the “iSiPP300” silicon photonics process developed at Belgian electronics research center imec.

Featuring co-packaged optics (CPO) compatibility, the technology will enable UMC to bring a 12-inch wafer diameter silicon photonics platform to market targeting next-generation connectivity, manufacturing photonic integrated circuits (PICs) for 800 Gb/s and 1.6 Tb/s pluggable optics aimed at hyperscale data centers and AI computing clusters.

Developed at imec over the past 25 years, the silicon photonics technology supports a range of active and passive components including Mach-Zehnder modulators and low-loss grating couplers.

It is also compatible with lithium niobate modulators, III-V semiconductor lasers, and semiconductor optical amplifiers (SOAs) that can be integrated through microtransfer printing. Indium phosphide lasers can be added through a wafer-scale flip-chip bonding process.

Optical transceivers
GC Hung, UMC’s senior VP, said in a release from the Hsinchu chip foundry: “We are pleased to license state-of-the-art silicon photonics process technology from imec, which will enable UMC to accelerate the readiness of our photonic platform on 12-inch wafers.

“UMC is working with several new customers to deliver PIC chips on this new platform for optical transceiver applications, with risk production slated for 2026 and 2027.”

In combination with the firm’s existing advanced packaging capabilities, UMC says it is well positioned to extend its photonics-based offerings as system architectures evolve toward greater integration with CPO to yield high-bandwidth, energy-efficient, and highly scalable optical interconnects to provide links both within and between data centers.

Philippe Absil, now VP at the "IC-Link by imec" division, added: “Over the past decade, imec has shown that advanced CMOS processing on 12-inch wafers for silicon photonics can deliver significant performance gains.

"Our iSiPP300 platform features very compact and energy-efficient devices, including microring-based filters and modulators, as well as GeSi electro-absorption modulators (EAMs), complemented with diverse low-loss fiber interfaces and 3D packaging modules.

“IC-Link by imec works closely with the semiconductor industry to ensure that the most advanced technologies are available for product manufacturing, and this agreement with UMC is a demonstration of our collaborative approach, enabling us to bring cutting-edge silicon photonics solutions to a broader market and accelerate adoption in next-generation compute systems.”

Silicon photonics at imec
imec’s silicon photonics activity dates back to 2000, when a dedicated research program was first established.

Since 2018, the now-mature technology has become available for high-volume manufacturing, with an extensive and continuously updated process development kit (PDK) enabling customers to design advanced PICs that can be mass-produced at silicon fabs.

The latest PDK for the iSiPP200 platform is said to provide a broad portfolio of devices supporting 200 Gb/s per lane data speeds, supporting 800 Gb/s and 1.6 Tb/s pluggable optics for hyperscale data centers and AI clusters. An upgrade to 400 Gb/s lane speeds, enabling 3.2 Tb/s pluggable optics, is in progress.

Other recent developments at imec have included more direct photonic integration with the laboratory demonstration of electrically-driven GaAs-based nano-ridge laser diodes, monolithically fabricated on full-sized silicon wafers in its CMOS pilot prototyping line.

That January 2025 breakthrough is expected, eventually, to provide a pathway to the development of cheaper high-performance optical devices for applications in data communications, without the need for complex microtransfer printing or flip-chip process steps.

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© 2025 SPIE Europe
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