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Moore's law hits a bump as Intel pushes back 10nm move

17 Jul 2015

Current scaling challenges and questions over the maturity of extreme UV lithography shift Intel's metronome.

Chip giant Intel has signaled a slowing of Moore’s law in response to the challenges of scaling to the semiconductor industry’s forthcoming 10 nm technology “node”, with implications for the future introduction of laser-powered extreme ultraviolet (EUV) lithography equipment.

At the company’s quarterly results call with investors earlier this week, CEO Brian Krzanich said that Intel had decided to introduce a third product at the 14 nm “node”. That is significant because it marks a shift from the firm’s long-standing and metronomic release of new products packing ever more transistors onto chips.

Referring to the slow-down of Gordon Moore’s 1975 prediction that transistor density would double every two years thanks to scaling advances that are largely a result of photolithography, Krzanich told investors: “The last two technology transitions have signaled that our cadence today is closer to 2.5 years than two.”

Transistor density
Originally, Moore’s law predicted a doubling of transistor density every year. But since the 1975 adjustment to doubling every two years Intel has stuck to what it calls its “tick-tock” model – meaning that it would launch two product families at each new “node”. The “tick” represents the introduction of the first product made using a new process technology, and the “tock” represents a refined version usually launched a year later.

For the current 14 nm node, that scheme is now changing to “tick-tock-tock”. Krzanich said that Intel would now introduce a third 14 nm product in the second half of 2016, under the code-name “Kaby Lake”. That will follow the imminent launch of "Skylake", the first "tock" product of the 14 nm node.

“Then in the second half of 2017, we expect to launch our first 10 nm product, code-named Cannonlake,” added the CEO. “We expect that this addition to the roadmap will deliver new features and improved performance, and pave the way for a smooth transition to 10 nm.”

Questioned by investors on that decision, Krzanich replied: “We took a snapshot of the 14 nm to 10 nm transition. We looked at the history, and we said let's be very predictable and do the best thing for shareholders and for our partners and customers.”

No EUV at 10 nm
Although Intel is widely believed to be the company that placed an order with ASML for 15 EUV lithography tools earlier this year, and which has – along with Samsung and TSMC – invested heavily in the equipment firm to support EUV technology development, it will not be using the new approach in its 10 nm launch.

In response to an investor query, Krzanich said: “The lithography is continuing to get more difficult as you try and scale and the number of multi-pattern steps you have to do [with more conventional deep-UV immersion lithography] increases.

"This is the longest period of time without a lithography node change. We're assuming 10 nm does not have EUV for our technology.”

Even assuming that Intel regains its “tick-tock” rhythm after the planned 10 nm node launch in 2017, that would mean EUV will not be making chips in volume on Intel’s mass production lines until the 7 nm node appears in 2019.

And if “tick-tock-tock” becomes the new norm, the introduction of chips featuring EUV-manufactured transistors may not happen until 2020.

Considering the longer-term outlook, Krzanich said: “We'll always strive to get [Moore’s law] back to two years. And we'll take a look at the maturity of EUV, [and] the maturity of the material science changes that are occurring, the complexity of the product roadmap that we're adding, and make that adjustment out in the future.”

The comments appeared to have an impact on ASML's stock price, which has been trading close to record highs in recent months. Having risen by around 5 per cent following its own latest quarterly financial results, that gain was completely given up following the update from Intel shortly afterwards.

Discussing EUV progress at ASML's own investor call earlier this week, the equipment firm’s CEO Peter Wennink said that development work had now progressed to the point where one customer had been able to expose more than 1000 wafers in a 24-hour period, the kind of productivity level needed for mass production.

However, EUV source power and stability still need to improve and although six production tools are now on order the likes of Intel have stipulated that these will need to meet key performance milestones before full payment is made for them.

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