Fujitsu technology develops 0.1-micron insulation material

17 Jun 2002

Fujitsu Laboratories Ltd. has developed a technology for themolecular design of a material which can realize 0.1-micronprocess technology. The nanocavity technology, which allows thecontrol of the shape of nanometer-scale cavities, allows Fujitsuresearchers to create a material that has a dielectric constantof 2 or slightly below, and combines resistance to water andalkali with layer strength suitable to develop LSI chips thatwill run at a frequency of 2 GHz.

The 0.1-micron process would not only increase clockfrequency to 2 GHz from the 0.75 GHz frequency provided by 0.25-micronCMOS chips, but would also reduce gate delay from 7picoseconds to 2.5 picoseconds and reduce the dielectric constantof the inter-metal insulator from 4 to 2.

Fujitsu used a supercomputer to evaluate a variety ofmaterials through molecular orbital calculation, which measuresthe interactions of electrons comprising molecular orbits andpredicts the electro-optic and chemical properties of themolecule. The molecular properties and dielectric constants werecomputed, and researchers determined that the mere presence ofhaving small cavities inside the molecules was not sufficient tobring the dielectric constant below 2. That conclusion led tothe premise that formation of molecular-scale cavities wasrequired.

The cavity volume was enlarged after a method was devisedfor organic molecules to be joined to a silicon monomer andpolymerized. The molecules were then eliminated, and by usingthe supercomputers for molecular design it was found thatalicyclic monomers, molecules with a three-dimensional structureresembling a paper balloon, would meet the conditions to producethe prerequisite cavities.

After an alicyclic monomer was synthesized with the resultsof the molecular design, it was joined with a silicone monomer,dissolved in a solvent, and applied to the substrate. Itpolymerized and formed a thin layer, after which the alicyclicportion was removed and cavities were formed.

The material was then observed through a transmissionelectron microscope, which confirmed the formation of a thinlayer with shape-controlled cavities in the nanometer range. Thedielectric constant was measured and a value of 1.98 had beenachieved.

The material not only achieves a low dielectric constant butalso allows the formation of layers through spin coating, inwhich a thin, uniform layer is formed by spinning at high speed acircular plate upon which material dissolved in a solvent isplaced. Other properties include heat resistance up to 500degrees Celsius, improved layer strength, and easy adhesion tometals and other materials. The low stress within each layerallows use in multi-layer designs, and the ability to choose theshape of the molecule and thus the shape of the cavities allowscontrol of the layer strength and other physical properties.

The new material can also form porous silicon layers withprecisely controlled activation on metal surfaces such aselectrodes. Potential applications for the new material includenot only CMOS chips and inter-metal dielectric insulators withmulti-chip models, but also materials for sensors and catalytic,adsorbent, and filtering materials.