12 Feb 2019
EU project intends to develop terabit optical transceivers through photonic integration.
The TERIPHIC consortium, named for its goal of "TERabit optical transceivers based on InP EML arrays and a Polymer Host platform for optical InterConnects," intends to address the challenges of developing such high-capacity modules.
This will involve leveraging current concepts in photonics integration, with the ultimate goal of designing a "seamless chain of component fabrication, assembly automation and module characterization processes as the basis for high-volume production lines," according to the team.
"Ultimately, the new transceiver design introduced by TERIPHIC will allow significant cost savings, due to assembly automation of both the transmitter and receiver optical subassembly (TOSA/ROSA) parts, and also at the packaging level, resulting in a cost of below €1 per Gbps for the transceiver modules."
Fraunhofer HHI has said that it is the core technology provider in the project, providing the PolyBoard platform for hybrid integration of active components, the electroabsorption modulated laser (EML) technology for the generation, modulation and amplification of light in a single chip, and the high bandwidth PD technology. The TOSA/ROSA assembly automation will also be developed in house at Fraunhofer HHI, using assembly machines from ficonTEC.
Lower power consumption
"A practical path to the terabit regime is to scale the current 400G modules, which in the most forward-looking version of the standards are based on four parallel lanes, each operating with PAM4 multilevel signaling at 53 Gbaud," noted the project's Cordis documentation. "Scaling these modules by adding lanes looks simple, but entails challenges with respect to the fabrication and assembly complexity that can critically affect their manufacturability and cost."
TERIPHIC's technology focus will be on EML arrays in the wavelength range termed the O-band, along a polymer chip that will act as the host platform for the integration of the photodetector arrays and the wavelength multiplexing and demultiplexing of the lanes.
"Using these methods, TERIPHIC will develop plugable modules with eight lanes (800G capacity) and mid-board modules with 16 lanes (1.6T capacity) having a reach of at least 2 km," noted the project.
"Compared to the 400G standards, the modules will reduce by 50 percent the power consumption per Gb/s, and will have a cost of €0.3 per Gb/s. After assembly, the modules will be mounted on the line cards of MLNX switches, and will be tested in real settings. A study for the consolidation of the methods and the set up of a pilot assembly line in the post-project era will be also made."
Partners in the consortium alongside Germany's Fraunhofer HHI and ficonTEC include III-V Lab of France; Mellanox Technologies of Israel; and Telecom Italia. The project is coordinated by the Institute of Communication and Computer Systems (ICCS) at NTU Athens, Greece. TERIPHIC is scheduled to run for three years until December 2021 with an overall budget of €5.6 million, of which the EU contribution will be €4.7 million.
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